niccle

In this final post in a series of posts on my Niccle project, I describe how I implemented and optimized a MAC layer on top of my bit banged Ethernet 10BASE-T PHY implementation, responsible validating packet checksums, buffering received packets, and interfacing with higher-level TCP/IP software stacks.

In this post I discuss how I implemented a bit banged Ethernet 10BASE-T PHY receiver layer.

In this post I'll implement those parts of the Ethernet 10BASE-T PHY layer that are necessary to support outgoing data transmissions, and I'll turn that code into a small library that can be reused, and upon which I can build further features.

In this post I discuss how to count the number of CPU cycles spent executing code on the ESP32-C3 and ESP32-C6 microcontrollers, and why you might want to do that. I work through a small example of measuring the CPU cycles spent executing a number of iterations of a simple loop, and describe how we can use the results to build a model describing how many CPU cycles are required for each instruction in the loop.

In this post I discuss an electrical circuit design for connecting a microcontroller to an Ethernet 10BASE-T network using a differential transceiver. I then describe how to perform a rudimentary validation of the electrical circuit using a few lines of code and an oscilloscope. This post is part of a series of posts relating to Niccle, my Ethernet 10BASE-T bit banging project.

In this post I provide a high-level overview of how Ethernet works, focusing on the 10BASE-T variant in particular. I'll discuss Ethernet's electrical characteristics, and I'll describe how the Ethernet spec is divided into two major layers: the physical (PHY) and the medium access control (MAC) layers, each of which focuses on a different set of responsibilities. This post is part of a series of posts relating to Niccle, my Ethernet 10BASE-T bit banging project.