rust
Implementing and optimizing an Ethernet 10BASE-T MAC layer for maximum throughput
In this final post in a series of posts on my Niccle project, I describe how I implemented and optimized a MAC layer on top of my bit banged Ethernet 10BASE-T PHY implementation, responsible validating packet checksums, buffering received packets, and interfacing with higher-level TCP/IP software stacks.
Receiving data at the Ethernet 10BASE-T PHY layer
In this post I discuss how I implemented a bit banged Ethernet 10BASE-T PHY receiver layer.
Transmitting data at the Ethernet 10BASE-T PHY layer
In this post I'll implement those parts of the Ethernet 10BASE-T PHY layer that are necessary to support outgoing data transmissions, and I'll turn that code into a small library that can be reused, and upon which I can build further features.
Counting CPU cycles on ESP32-C3 and ESP32-C6 microcontrollers
In this post I discuss how to count the number of CPU cycles spent executing code on the ESP32-C3 and ESP32-C6 microcontrollers, and why you might want to do that. I work through a small example of measuring the CPU cycles spent executing a number of iterations of a simple loop, and describe how we can use the results to build a model describing how many CPU cycles are required for each instruction in the loop.
Designing an electrical circuit for connecting to Ethernet 10BASE-T
In this post I discuss an electrical circuit design for connecting a microcontroller to an Ethernet 10BASE-T network using a differential transceiver. I then describe how to perform a rudimentary validation of the electrical circuit using a few lines of code and an oscilloscope. This post is part of a series of posts relating to Niccle, my Ethernet 10BASE-T bit banging project.
Niccle: an Ethernet 10BASE-T bit banging project
I've started a new hobby project which I'm calling Niccle. Niccle will be a bit banged implementation of the Ethernet 10BASE-T protocol, written in Rust and initially targeting the ESP32-C6 microcontroller. In this first post about the project I'll set out my goals, and discuss a few of the other similar projects I took inspiration from.
The GPIO speed of ESP32-C3 and ESP32-C6 microcontrollers
In this post I explore the maximum GPIO output and input speed we can achieve with ESP32-C3 and ESP32-C6 microcontrollers. The standard way of doing GPIO is limited to signal frequencies of less than 10MHz, but the "dedicated IO" mechanism available on the ESP-C and ESP-S chip series provides an alternative solution that can output and sample signals with frequencies in the 40MHz to 80MHz range.